P2020 JTAG connection failure

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

P2020 JTAG connection failure

1,184 Views
jingyibin
Contributor I

When I try to connect P2020 JTAG in CodeWarrior 10.5.1, it cannot read register address PORBMSR, which leads to connection failure.

Why the JTAG cannot read this register?

0 Kudos
4 Replies

1,136 Views
yipingwang
NXP TechSupport
NXP TechSupport

Would you please refer to the following procedure to capture CCS console log to me to do more investigation?

Please create a SRAM bareboard project(in Debug Target Setting panel, please select Download/Connect SRAM).

Before connecting to the target, please enable CCS log from "Run->Debug Configurations-><project>-core00_RAM_P2020_Download->Edit...->Advanced->Advanced CCS setting->Enable logging", and connect to the target from "Run->Debug Configurations-><project>-core00_RAM_P2020_Download->Debug", the CCS log will be printed in the console panel in CodeWarrior IDE.

 

Note: Please open the console panel from Window->Show View->Console, and if nothing displayed, please choose the correct session on the right top icon in the panel.If the CCS log in the console is truncated, please enlarge the console buffer from Window->Preferences->Run/Debug->Console->uncheck "Limit console output".

0 Kudos

1,136 Views
jingyibin
Contributor I

I created a SRAM bareboard project using SRAM_Download in debug mode. I captured all the CCS log message. The CCS log file is in attachment file. The main problem in the log is "Error reading memory".

Hope this log could help locate the problem.

Best Regards

0 Kudos

1,136 Views
yipingwang
NXP TechSupport
NXP TechSupport

There is problem at reading registers and SRAM memory 

he SAP (System Access Port) is the portal through which the debugger reads and writes target hardware memory. The "cannot start SAP transaction" message means that the SAP is encountering a bus error on that address.

 

1) Refer to the P2020 QorIQ Integrated Processor Hardware Specifications, Table 1. P2020 Pinout Listing and ensure that all the notes are fulfilled in the design.

2) Measure the processor's AVDD voltages to ensure that PLL noise filter circuits are implemented properly.

0 Kudos

1,136 Views
jingyibin
Contributor I

The main message in console is below:

There are many "error reading memory" messages in the log file. I sent the whole log to you later.

Do you have any idea about this error message?

Best regards

发自我的 iPhone

在 2020年6月18日,16:32,yipingwang <admin@community.nxp.com> 写道:

NXP Community

Re: P2020 JTAG connection failure

reply from Yiping Wang in QorIQ Processing Platforms - View the full discussion

Would you please refer to the following procedure to capture CCS console log to me to do more investigation?

Please create a SRAM bareboard project(in Debug Target Setting panel, please select Download/Connect SRAM).

Before connecting to the target, please enable CCS log from "Run->Debug Configurations-><project>-core00_RAM_P2020_Download->Edit...->Advanced->Advanced CCS setting->Enable logging", and connect to the target from "Run->Debug Configurations-><project>-core00_RAM_P2020_Download->Debug", the CCS log will be printed in the console panel in CodeWarrior IDE.

Note: Please open the console panel from Window->Show View->Console, and if nothing displayed, please choose the correct session on the right top icon in the panel.If the CCS log in the console is truncated, please enlarge the console buffer from Window->Preferences->Run/Debug->Console->uncheck "Limit console output".

Reply to this message by replying to this email, or go to the message on NXP Community

Start a new discussion in QorIQ Processing Platforms by email or at NXP Community

Following Re: P2020 JTAG connection failure in these streams: Inbox

This email was sent by NXP Community because you are a registered user.

You may unsubscribe instantly from NXP Community, or adjust email frequency in your email preferences

>

0 Kudos