LPC55S69 : SAU minimal configuration

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LPC55S69 : SAU minimal configuration

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EugeneHiihtaja
Senior Contributor I

Hi !

I would like to simplify memory attributes configuration and decide to disable IDAU. Looks like it is redundant in common cases.

Do I understand right and in case of SAU I should specify only NS and NSC memory regions only ( non-secure memory address range are in use) ? Other parts remain secure by default.

I have added non-secure flash and sram , peripheral area and PPB area ( 0xE0000000 - 0xE003FFFF (256KB)).

After that MSW,MPC/PPC setting refine final access attributes.

Looks like I should specify peripheral area in SAU, because PPC can't enable peripheral usage on nonsecure side.

But PPB area definition in SAU looks like redundant and on user side in privileged mode I can enable/disable interrupts for example. Is any idea why PPB area looks out of "SAU" control ?

ConfigTool is even complains about PPB address range : 

"

Issue: The address exceeds all existing memory blocks. The highest memory block ends at 0x50103FFF
Level: Warning
Type: Tool problem
Tool: TEE
Origin: TEE
Resource: SAU Memory Region at Index 5
Information: The address exceeds all existing memory blocks. The highest memory block ends at 0x50103FFF

 "

Regards,

Eugene

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ZhangJennie
NXP TechSupport
NXP TechSupport

Hi Eugene Hiihtaja

If you don't enable the region in "SAU memory regions", the default security is S. see below screenshot

If you enable it, you can only configure it as NS or NSC

pastedImage_1.png

Regarding to your other question "why PPB area looks out of "SAU" control ?", Can you please send me step by step screenshots or a video of how to reproduce this issue? I will check.

Thanks,

Jun Zhang

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EugeneHiihtaja
Senior Contributor I

Hi ZhangJennie‌ !

Try to add 0xE0000000 - 0xE003FFFF area to SAU configuration. It should be accessible from non-secure side as well. But not provisioned.

I also disable IDAU.

 

So even this area is not provisioned, everything works fine. Looks like PPC area is always accessible on non-secure side.

MPU is also configured in my case. But PPB area covered by default setting of it. E,g access enabled in privileged mode.

Regards,

Eugene

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ZhangJennie
NXP TechSupport
NXP TechSupport

This is LPC55s69 trustzone mapping, please define your region in given address range.

pastedImage_1.png

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EugeneHiihtaja
Senior Contributor I

Hi ZhangJennie‌ !

Looks like adding 0xE0000000 - 0xE003FFFF area to SAU configuration is block secure side for some accesses and 

"

Entering HardFault interrupt!
Another secure bus error.

"

Happens some time. For example when I read all MPU_S registers for see what is current configuration.

I assume that PPB area has special rules and accessible on secure and non-secure side even SAU keep it secure by default.

And IDAU is disabled.

But from UM this rule is not clear.

Is any idea what can be default access rule for PPB area ?

Regards,

Eugene

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ZhangJennie
NXP TechSupport
NXP TechSupport

0xE0000000 - 0xE003FFFF is not in LPC55s69, why you configure this address?

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EugeneHiihtaja
Senior Contributor I

Hi ZhangJennie‌ !

This is natural ARM PPB area.

And it is mentioned as well in UM :"Fig 172. Security attribute definition as combination of SAU and IDAU"

In my case IDAU is disabled and in non-secure side this area accessible in privileged mode without any problem

even it is not mentioned in SAU.

Looks like some how configured somewhere deafult access to it on nonprivileged side.

And would be nice to know if this is expected.

Regards,

Eugene

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ZhangJennie
NXP TechSupport
NXP TechSupport

PPB area is not displayed in the Memory Map view. It can be configured in SAU tab of the Security access configuration view, however the resulting access is not shown in the tool. The area 0xF000_0000 - 0xFFFF_FFFF is fixed as secure in both SAU and IDAU.

Please send me screenshot of how you config 0xE0000000 - 0xE003FFFF in PPE and demo project to reproduce your issue

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EugeneHiihtaja
Senior Contributor I

Hi ZhangJennie‌ !

Now I'm not add any PPB area configuration to SAU tab.

But PPB area of nonsecure side can be added to it and ConfigTool generate code.

SAU tab generate warning only and do not have any hard protection.

I can see generated code in tzm_config.c

#define REGION_5_BASE 0xE0000000U
#define REGION_5_END 0xE003FFFFU

/* Set SAU region number */
SAU->RNR = 0x00000005U;
/* Region base address */
SAU->RBAR = REGION_5_BASE & SAU_RBAR_BADDR_Msk;
/* Region end address */
SAU->RLAR = ((REGION_5_END & SAU_RLAR_LADDR_Msk) | ((0U << SAU_RLAR_NSC_Pos) & SAU_RLAR_NSC_Msk)) | ((1U << SAU_RLAR_ENABLE_Pos) & SAU_RLAR_ENABLE_Msk);

But if I specify this area as NS, I have quite often fault like this :

Entering HardFault interrupt!
SCB->BFSR:PRECISERR fault: Precise data access error.
Address that caused secure bus violation is 0xE000ED90.

I have got conclusions that PPB area is always accessible on non-secure side by default.

If it configured in SAU, it cause some problem for Secure side what also can access this area using  non-secure address range.

But in any case those rules are not mentioned anywhere.

Why non-secure side has default access to PPB ?

Regards,

Eugene

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ZhangJennie
NXP TechSupport
NXP TechSupport

"Please send me screenshot of how you config 0xE0000000 - 0xE003FFFF in PPE and demo project to reproduce your issue" Thanks.

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EugeneHiihtaja
Senior Contributor I

Hi ZhangJennie‌ !

You can see 5th region is not enabled but I enable it for testing purposes.

pastedImage_1.png

But it might be so that it is hidden and no require any provisioning.

But it should be specified somewhere.

Regards,

Eugene

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ZhangJennie
NXP TechSupport
NXP TechSupport

Regarding to the warning message, I am check it with development.

Besides,

0xe00000000-0xefffffff, by default SAU set it as secure. IDAU set it non secure. so overall, default is secure.

If you don't check region5, it's secure feature. So with this default setting, there is no error.

if you enable region5, set this region as non secure, you got HardFault error. Is this your problem?

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EugeneHiihtaja
Senior Contributor I

Hi ZhangJennie‌ !

IDAU is disabled in my case.

Yes, if I enable region5 HardFault happens .

But non-secure part is able to access PPB even it is non-secure by default.

How possible to explain this phenomena ?

Regards,

Eugene

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ZhangJennie
NXP TechSupport
NXP TechSupport

I need to reproduce your issue first. 

with your screenshot, I know how you set TEE.

Next, how to modify a demo for example hello_world_s to see your hardfault error? please detail the steps.

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EugeneHiihtaja
Senior Contributor I

Hi ZhangJennie‌ !

I think it is more important to find out why PPB area is not provisioned at all.

All your SDK examples doesn't have it in SAU configuration.

Can you say if LPC grant access to PPB area automatically for non-secure side ?

Even IDAU is disabled. So this is not error , it is expected.

Regards,

Eugene

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ZhangJennie
NXP TechSupport
NXP TechSupport

By checking, PPB area includes ARM core registers. it can only be accessed with default secure setting. Please don't set it NS.

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