Me and my team are working on this issue: Edge tpu m.2 without MSI-X interrupts? · Issue #122 · google-coral/edgetpu · GitHub
and wanted to check if it is possible to enable MSI-X interrupts for layerscape 1043a processor ?
Following are the system details:
root@buildroot:~# lscpu Architecture: aarch64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 4 On-line CPU(s) list: 0-3 Thread(s) per core: 1 Core(s) per socket: 4 Socket(s): 1 NUMA node(s): 1 Vendor ID: ARM Model: 4 Model name: Cortex-A53 Stepping: r0p4 CPU max MHz: 1600.0000 CPU min MHz: 700.0000 BogoMIPS: 50.00 NUMA node0 CPU(s): 0-3 Vulnerability Itlb multihit: Not affected Vulnerability L1tf: Not affected Vulnerability Mds: Not affected Vulnerability Meltdown: Not affected Vulnerability Spec store bypass: Not affected Vulnerability Spectre v1: Mitigation; __user pointer sanitization Vulnerability Spectre v2: Not affected Vulnerability Tsx async abort: Not affected Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32 cpui d
root@buildroot:~# uname -a Linux buildroot 5.6.1-00002-gd947bcc2b6e5-dirty #33 SMP PREEMPT Wed May 20 19:59:11 UTC 2020 aarch64 GNU/Linux
