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IFC and memory stall on multi core

Question asked by Eduard Stefes on May 26, 2020
Latest reply on May 29, 2020 by Bulat Karymov



we use the LS1020a QoriQ and have something connected via IFC GPCM ASIC mode. Currently we run into race conditions then independent parts of the software try to read via IFC at the same time. Chapter 24 of LS1021ARM.pdf does not mention anything about memory stalling.


my question:


Is it possible to stall both cores when one core is doing an operation via IFC or does this need to be handled via software mutexes?