There is a small section dedicated for i.MX RT1050 Interrupts in Chapter 4 but it covers on which interrupts are available on the processor and DOES NOT provide any detail information on GPIO interrupts.
I am looking for detail explanation on
1) how to use the first 8 GPIO1 interrupts (which are marked to be for "active high interrupt)
2) how to use the Combined interrupts which seem to have been grouped in 2 sets of 16 signals on each GPIO.
The NXP example project is too simple to have thorough understanding of exactly how to use the interrupts in more complicated use cases where there are several interrupts to be handled in combination of active high, active low, rising, & falling edge based interrupts on same GPIO port (1, 2, 3, 4, 5).
Help is much appreciated.