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More than 4 CS lines for SPI

Question asked by Marcus Nascimento on May 22, 2020
Latest reply on May 24, 2020 by igorpadykov

The documentation for iMX6UL and iMX8 says SPI has 4 CS lines.

I intend to use a total of 12 SPI devices connected to SPI1, 2 and 3 (4 in each).
As far as I understood, I can configure CS pins as GPIO and use the kernel driver configurations to define all 12 CS lines from GPIOs.


Is my understanding correct or is there some hardware limitation I'm missing?