AnsweredAssumed Answered

Application Layer: IMX8MQ to IMX8MQ communication using PCIe cross-link

Question asked by Harshit Shah on May 22, 2020
Latest reply on May 25, 2020 by igorpadykov

Hi NXP Team,


We have gone through the reference of the below link:

i.MX6Q PCIe EP/RC Validation System 


  1. In our end application we want to establish full-duplex communication between two processors. (which might not be the video data). How we can build the same? 
  2. In the application how we can establish the synchronization between these two reads and write?  Is this something already implemented by NXP?