P2020,TESC3 can not ping

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

P2020,TESC3 can not ping

3,163 Views
trinum_lu
Contributor III

Hi

   Thank to answer this question。

   There are some problem about the chip P2020,I using 2 ETH PHY in this project,which using in TSEC1 and TSEC3。TSEC1 is no problem and it can ping the computer。But the other one,TSEC3 ,which is unable to ping computer。TSEC1 and TSEC3 using the same PHY and the same schematic。And TSEC3's PHY can recognize the Internet is 100M or 1000M,but can not Ping computer。Thanks!

Thanks!

Labels (1)
0 Kudos
16 Replies

3,036 Views
ufedor
NXP Employee
NXP Employee

Please provide additional information:

1) complete schematics of the Ethernet connections as PDF - not pictures

2) value of the GUTS_PORDEVSR

3) raw memory dump of the eTSEC3 CCSR registers

0 Kudos

3,036 Views
trinum_lu
Contributor III

Hi ufedor

   Schematic as annex,and the register 

CCSBAR:

0xF300_0000 | 1MB   | 0xF30F_FFFF | CCSBAR

GUTS_PORDEVSR :

pastedImage_2.png

Thanks

0 Kudos

3,036 Views
ufedor
NXP Employee
NXP Employee

Please refer to the PORDEVSR value 0x1A000000 to see that:

ECW=0 - eTSEC1 and eTSEC2 Ethernet interfaces operate in reduced pin mode

ECP1=10 - RGMII

ECP2=00 - Reserved

ECP3=00 - Reserved

It is required to check strapping of cfg_tsec3_prtcl[0] (UART_RTS0_B).

0 Kudos

3,036 Views
trinum_lu
Contributor III

But UART_RTS0_B is using internal pullup and didn't connected to another pin,this pin will not be pulldown by another signal or resister。When the H_Rest reset,this pin is High level.

0 Kudos

3,036 Views
ufedor
NXP Employee
NXP Employee

Use digital scope to check the signal level during POR.

0 Kudos

3,036 Views
trinum_lu
Contributor III

I found that using Jtag to read the register is right,but when the VxWorks is working or rebooting,and then read the register is wrong。

pastedImage_1.png

pastedImage_2.png

0 Kudos

3,036 Views
ufedor
NXP Employee
NXP Employee

Use digital scope to check the signal level during reset sequence.

0 Kudos

3,036 Views
trinum_lu
Contributor III

Yellow : UART_RTS0_B

Green : H_Rest

      Before reset,UART_RTS0_B is 2.65V and then after reset begin to 3.33V

pastedImage_2.png

0 Kudos

3,036 Views
ufedor
NXP Employee
NXP Employee

You wrote:

> I found that using Jtag to read the register is right,

> but when the VxWorks is working or rebooting,and then read the register is wrong

What is the whole sequence?

1) I.e. when JTAG read is performed?

2) Is any reset applied after that before VxWorks starts?

3) Is the same method used to read the register when VxWorks is running?

0 Kudos

3,036 Views
trinum_lu
Contributor III

As you said,the register need used unique Code to read after VxWorks is running。

Now we get the value by VxWorks is equal to the Jtag's value.

But also can not ping the computer.

VxWorks:

pastedImage_1.png

Jtag:

pastedImage_3.png

0 Kudos

3,036 Views
ufedor
NXP Employee
NXP Employee

Please provide raw memory dumps of eTSEC1 and eTSEC3 CCSR registers.

0 Kudos

3,036 Views
trinum_lu
Contributor III

Is this one?

eTSEC1:

pastedImage_2.png

eTSEC3:

pastedImage_1.png

0 Kudos

3,036 Views
ufedor
NXP Employee
NXP Employee

Please provide complete raw memory dumps containing all eTSEC1 and eTSEC3 CCSR registers as text files attachments.

0 Kudos

3,036 Views
trinum_lu
Contributor III

Thanks,there are the CCSR log.If this one is wrong,please ask me to provide another one by right way.Thanks!

0 Kudos

3,036 Views
ufedor
NXP Employee
NXP Employee

Please determine (by inspecting software) why ETSECx_MACCFG2 values are different:

eTSEC1:

0x00007235

eTSEC3:

0x00007134

0 Kudos

3,036 Views
trinum_lu
Contributor III

Thank you very very very very much.

The second PHY is no Problem。Because of the register was wrong,and I change the register and then soft reset the PHY,after that MAC can receive the data and can ping the computer。

The register as this.Chang this register to 0xce2 is fine。

pastedImage_1.png

0 Kudos