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Can the iMX8MQ HDMI differential reference clock be removed?DDR4 Reference design

Question asked by haochengdong haochengdong on May 19, 2020
Latest reply on Jun 1, 2020 by Rita Wang


According to the manual description, the PMA reference clock can select two clock sources, namely refclk_p / m or refclock.

PMA external reference clock. Only valid for DP.The HDMI pixel clock cannot be driven on thesepins. For DP, supports nominal frequencies of 19.2, 20, 24, 27, 54 and 108 MHz.

The following external reference clock sources are supported:

• AC coupled differential low swing clock(HCSL levels)

• DC single ended clock on refclk_p pin. In this mode refclk_m should be tied to ground. This mode is for test purposes

For DP, a reference clock must be provided on either these external pins or on the refclock internal SoC-side pin.

According to the above description, if I only configure the HDMI function and not the DP function, can I remove the 27 MHz differential clock..

RM manual describes DRAM Up to 8GB of memory capacity,But Memory Map can only address to 4GB.

Is the description of the manual incorrect?


Our motherboard uses 2 16Gb DDR4. If we want the best performance, can the address line be Fly-by topology? Is there a corresponding reference.