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MIPI-CSI2 reset and initialization procedure for i.MX8QXP

Question asked by Kazuma Sasaki on May 18, 2020
Latest reply on May 31, 2020 by Kazuma Sasaki

Hello,

 

From IMX8DQXPRM.pdf (Rev.0)

 

 

I am trying MIPI-CSI2's driver porting to other OS. Please let me confirm detail of above procedure.

 

<Development Environment>

SoC : i.MX8QXP

Board : MCIMX8QXP-CPU

Based BSP : Linux BSP L4.14.98_2.3.0_ga

 

<Questions>

Q1. "2. Wait until clocks to the Rx Controller are stable and ensure DPHY interface is idle".

       above comments are implemented by following code. Is it right? I could not clearly understand meaning of the bit#31. because it is defined as reserved in RM.

 

Copy from linux/drivers/media/platform/imx8/mxc-mipi-csi2.h

Copy from linux/drivers/media/platform/imx8/mxc-mipi-csi2.c

 

 

Q2. "1. Assert all resets." It is implemented by following code. Is it right?

Copy from linux/drivers/media/platform/imx8/mxc-mipi-csi2.h

Copy from linux/drivers/media/platform/imx8/mxc-mipi-csi2.c

 

Q3. "5. De-assert all remaining resets." It is implemented by follwoing code. Is it right?

Copy from linux/drivers/media/platform/imx8/mxc-mipi-csi2.c

 

Q4. Control is different between "Assert reset" and "De-assert reset", but the current settings are same.

       Looks like both code set to 1b to CONTROLLER_CLOCK_RESET_CONTROL register. Is it okay?

 

Q5. From description no.3 and no.4 in RM, we should de-assert reset to CSR before program CSR registers.

       I could not find suitable code which de-assert reset to CSR in Linux BSP.

       How do I de-assert reset to CSR? 

 

Copy from linux/drivers/media/platform/imx8/mxc-mipi-csi2.c

 

Best Regards,

Kazuma Sasaki.

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