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Bus keeper feature of i.MX8X family

Question asked by Kazuma Sasaki on May 12, 2020
Latest reply on May 14, 2020 by Kazuma Sasaki

From Datasheet IMX8DXAEC Rev2:

 

"Keeper Circuit Resistance" is defined only single-voltage GPIO port.

But, It seems that we can select bus-keeper setting on following balls via PULL field in pad configuration register.

 

USB_SS3_TC0
USB_SS3_TC1
USB_SS3_TC2
USB_SS3_TC3
ADC_IN0
ADC_IN1
ADC_IN2
ADC_IN3
ADC_IN4
ADC_IN5
SCU_WDOG_OUT
PMIC_I2C_SCL
PMIC_I2C_SDA
PMIC_INT_B
SCU_BOOT_MODE0
SCU_BOOT_MODE1
SCU_BOOT_MODE2
SCU_BOOT_MODE3
MIPI_CSI0_MCLK_OUT
MIPI_CSI0_I2C0_SCL
MIPI_CSI0_I2C0_SDA
MIPI_CSI0_GPIO0_01
MIPI_CSI0_GPIO0_00
SCU_PMIC_STANDBY
SCU_GPIO0_00
SCU_GPIO0_01

 

<Questions>

Q1. Which balls support bus-keeper function? Is it only support above balls?

Q2. The bus-keeper feature is only applied for GPIO input mode. Is it right?

Q3. The bus-keeper feature does not mentioned in the current RM. Will it be revised in the nearly future?

 

Best Regards,

Kazuma Sasaki.

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