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Vybrid eSDHC Controller

Question asked by Ken Green on May 4, 2020
Latest reply on May 5, 2020 by Ken Green

I am trying to get a simple SDHC driver to work using the A5 core of the Vybrid processor. The board is a custom, however I know that both the board and the card are functional as I can use a Freescale driver and both work fine. I have pared down the driver to better understand what is going on in the initialization of an SDHC card.

I’m using PLL3 @ 480 MHz /5 to supply the clock into the eSDHC module. This supplies a 96 MHz clock into the module. During initialization this is divided down by the SYSCTL dividers to 400 KHz (/16 /15). The PRSSTAT_SDSTB bit is set so I know the module clock is functional. Then I run the following code:

   // Initialize the SDHC IO pins and module clock

   _esdhc_hw_init(1);    //set up the pins for SDHC 1

   _esdhc_clk_init(1);    //set up the clock

 

   // Disable the SDHC card clock per errata e3980

   esdhc_ptr->SYSCTL &= ~SDHC_SYSCTL_SDCLKEN_MASK;

  

   // Reset the controller

   esdhc_ptr->SYSCTL |= SDHC_SYSCTL_RSTA_MASK;

  

   // Set to low speed for initialization

   _esdhc_set_baudrate_low(esdhc_device_ptr->ESDHC_REG_PTR,   //pointer to reg set

                           _esdhc_init_parms->CLOCK_SPEED,    //incoming clock speed

                           400000);                           //desired clock speed

 

  // Enable the SDHC card clock again

   esdhc_ptr->SYSCTL |=  SDHC_SYSCTL_SDCLKEN_MASK;

  

   // CMD0 - Go to idle - reset card

   command.COMMAND = CMD0;

   command.ARGUMENT = 0;

   command.BLOCKS = 0;

   val = _esdhc_send_cmd(esdhc_device_ptr, &command);

   if(val & ESDHC_ERROR_MASK)

   {

      return(ESDHC_ERROR_INIT_FAILED);

   }

 

  

   // CMD8 - Check HC support, verify 2.7 to 3.6V operation

   command.COMMAND = CMD8;

   command.ARGUMENT = 0x000001AA;   // Voltage supply 2.7-3.6V 0x100 + 0xAA check pattern

   command.BLOCKS = 0;

   val = _esdhc_send_cmd(esdhc_device_ptr, &command);

 

Sending CMD8 always fails showing the card didn’t respond after 64 clocks. The register setup right after sending  CMD8 is:

 

 Note that the card clock is disabled using bit SDCLKEN before the RSTA and the clock dividers are set in SYSCTL per errata e3980. Then the clock is re-enabled. The send_cmd checks for no ongoing activity. All of the registers seem OK. Any ideas why the card doesn’t respond?

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