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IMX7DRM Memory map/register definition

Question asked by Andreas Vorderleitner on Apr 29, 2020
Latest reply on Apr 29, 2020 by Yuri Muhin



I am trying to port the ethernet interface to FreeRTOS and I am now in the process of creating various data structures to represent the memory map/registers.
However, I found some differences between the bit definition of almost all registers in the MCIMX7D_M4.h ( ) file and the IMX7DRM reference manual (Rev. 1, 01/2018) ( ). E.g. following register: Receive Control Register (ENETx_RCR).


It would be greate to know if the reference manual is correct or the original MCIMX7D_M4.h file. In detail, in the file MCIMX7D_M4.h bit 0 has been exchanged to bit 31. And vice versa.


Thanks in advance.


Best regards,