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RX fifo overflow on MIPI-CSI2 i.MX8MQ

Question asked by Twan Spil on Apr 27, 2020
Latest reply on Jun 9, 2020 by igorpadykov
Hi,
We are using a variscite iMX8MQ board attached to a custom PCB. This PCB has a VGA image sensor outputting RAW12 using 4 CSI MIPI Lanes, and is connected to the MIPI-CSI2 port of the iMX8. Using linux build 4.14.98 
 
We have successfully captured frames from the image sensor at 500fps, using 960Mbps readout speed. However we have encountered a bug with the RxFIFO overflowing and not being able to recover.  
 
Bugs:  
We are encountering a bug similar as errata ERR050066 (https://www.nxp.com/docs/en/errata/IMX8_1N94W.pdf), when the AXI  bridge gets busy with other activities the RxFIFO overflows. We can induce this by running an intensive operation, such as starting Chromium, or streaming from MIPI-CSI1. However according to this thread ( https://community.nxp.com/thread/524861 ) because we are streaming into memory we should not be encountering this exact bug.
 
The other bug is the RxFIFO Overflow does not recover, despite the csi_error_recovery() function in mx6s_capture.c clearing the BIT_RFF_OR_INT bit, the fifo overflows again and again.  
 
We have not been able to resolve this except by power cycling the iMX8. 
 
We have another image sensor attached to MIPI-CSI1 that is running at 13MP @ 10fps without any troubles. Both are using the same mx6s_capture.c driver. When running MIPI-CSI1 port, the MIPI-CSI2 port overflows even when running at 300Mbps 4 lanes.
 
Questions:  
Is there a way to prioritize the Memory transfers for the RxFIFO of the CSI2 port, so we very unlikely to overflow? I see that is patch was once applied for the VPU (Tom Zheng's patch from this thread https://community.nxp.com/thread/476615 ), is there something similar we could do? We have attached another image sensor to the MIPI-CSI1 port, and that does not appear to be overflowing.  
 
Is there a fix for the perpetual RxFIFO Overflow bug? Dropping a few frames in our application doesn't matter. Are there any known issues with clearing the RxFIFO and reflashing the DMA on the CSI2 port?
Thanks,
Refael and Twan

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