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imx7d WDOG Reset PMIC Inconsistencies

Question asked by David Wightman on Apr 27, 2020
Latest reply on Apr 28, 2020 by Yuri Muhin

I am having some reset issues with the imx7d and PFuze PMIC (PF3000).  I have the external WDOG connected to the PMIC PWRON, and am trying to do controlled resets using reboot commands or from a wdog event.

 

 

Most of the time after doing a power cycle, if I try and do a reset with the "reboot" command in linux or "reset" command in uboot, the board freezes.  When I probe the PWRON/WDOG_B signal, it seems like this event happens okay.  Then the POR is asserted, but then is never released, which I assume is the reason things freeze.  Doing more toggles of the PMIC PWRON with a switch doesn't bring it out of this state, and only a power cycle can clear it or if I hard pull the POR signal to Vcc (Using an ext. 100k pull up isn't enough).  Occasionally, the board will proceed with the reset after many minutes of sitting in this state, but that is not reliable.

 

It seems like the PMIC is not releasing the POR for some reason.  The PWRON_CFG=0.

 

Other times, for no apparent reason, the reboots happen okay.  Once I can get a reboot to work once, then every subsequent time, wdogs and reboots seems to work as expected until I do a power cycle.  

 

Is there something that could prevent the PMIC from releasing the POR after a PWRON pulse (PWRON goes low then high within ~10m - 20Sec)? Unless the SoC itself is preventing the POR from going high.

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