Which size of TX/RX FIFO of Ether MAC of i.MX6solo?
In 22.214.171.124 Ethernet MAC features, it can show simple 64bit FIFO
• Simple 64-Bit FIFO user-application interface
The other hands, TFWR bit in Transmit FIFO Watermark Register (ENET_TFWR),
It can set from 64bytes to 4032bytes.
Does it have local FIFO memory for TX/RX FIFO each in MAC module?
"FIFO" indicate a ring buffer on external memory addressed by ENET_RDSR and ENET_TDSR?