Processor Expert Memory Assignment Doesn't Know the Memory Map

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Processor Expert Memory Assignment Doesn't Know the Memory Map

Jump to solution
2,918 Views
GaryOlmstead
Senior Contributor I

Hi --

 

Same project as before.  Processor Expert, Build Options tab, ROMRAM Areas = 3.

 

Generate linker file   yes

Constants in xROM   yes

xROM-xRAM mode     no

pROM-xRAM mode     yes 

Stack size 200

Heap size 100

 

MemoryArea0

ROM/RAM Area Enabled

Name .p_Interrupts

Address 0

Size       A4

Qualifier  RWX

 

MemoryArea1

ROM/RAM Area Enabled

Name .p_Code

Address A4

Size       3F5C

Qualifier  RWX

 

MemoryArea2

ROM/RAM Area Enabled

Name .x_Data

Address 1

Size       FFF

Qualifier  RW

 

 

The above setup compiles, but there is a linker error that there is a segment overflow in p_Interrupts.

Reserved size is 0x148 Overflow 0x104

 

When I change p_Interrupts size to any larger value, including 0xA6, and change p_Code start address to match, I get an error that says there is no access to memory from whatever start address I entered to the end address.  Processor Expert won't compile. 

 

What causes this, and how do I fix it?

 

Gary

Labels (1)
Tags (1)
0 Kudos
1 Solution
435 Views
GaryOlmstead
Senior Contributor I

Hi Pascal --

 

OK, I'll send it a tech request. 

 

It isn't CW, it's PE.  Every version of PE has the problem.  Or at least every version I have tried.  Usually, I can live with it demanding to, for example, put HCS12 RAM at 0x1000 while insisting that 0x4000 does not exist, and then in the next project (same processor, same day, but for a different board) demanding that RAM be located at 0x4000, while insisting that 0x1000 does not exist  (which happened to me on my last HCS12 project).  But I'm new to the 56F8300 series, so I don't know PE's quirks for it yet.

View solution in original post

0 Kudos
5 Replies
435 Views
trytohelp
NXP Employee
NXP Employee

Hi,

 

This is not easy to determine the cause of the problem.
The better way will be to log it directly in the Technical support system.
Please use Freescale on line support web page.
  - Go to following URL: http://www.freescale.com/TechSupport
  - Click on Submit a Service Request. You will come to a login page.
  - You can submit your request through the web from there.

Please provide us more details about the Tool version used.
To do that you must:
* CW:
Start the IDE and click on Help | About Freescale CodeWarrior.
Click on Installed Products 
Provide us all info displayed.
Or you can save them in a txt file.

 

Can you please provide us your example reproducing the issue ?

 

Pascal

0 Kudos
436 Views
GaryOlmstead
Senior Contributor I

Hi Pascal --

 

OK, I'll send it a tech request. 

 

It isn't CW, it's PE.  Every version of PE has the problem.  Or at least every version I have tried.  Usually, I can live with it demanding to, for example, put HCS12 RAM at 0x1000 while insisting that 0x4000 does not exist, and then in the next project (same processor, same day, but for a different board) demanding that RAM be located at 0x4000, while insisting that 0x1000 does not exist  (which happened to me on my last HCS12 project).  But I'm new to the 56F8300 series, so I don't know PE's quirks for it yet.

0 Kudos
435 Views
GaryOlmstead
Senior Contributor I

This is really embarrassing, but the answer is that when you change the start address to a higher value, you have to compensate by reducing the amount of memory available.  Doh!!

 

Not that there is any defense for that sort of boo-boo, but the message that PE puts up could be clearer.

0 Kudos
435 Views
ProcessorExpert
Senior Contributor III
Hello Gary,

regarding to the setting of RAM on HCS12(X) derivatives could you please be more specific what setting, hint or warining of CPU bean is not sufficient for you in CW and PE for HCS12(X)? Could you please post here for example a project that leads you to the behaviour described above?

Best Regards,
Vojtech Filip
Processor Expert Team
0 Kudos
435 Views
GaryOlmstead
Senior Contributor I

I think I figured it out. I/m using the MC9S12A32, which doesn't have a separate data sheet.  I'm relying on the data sheet for the MC9A12DJ64, which is subtitled "Covers also MC9S12D64, MC9S12A64, MC9S12D32, MC9S12A32".  It says that all of these versions have 4K of RAM.  However, I just noticed that the Selector Guide agrees with PE in saying that the A32 and D32 have only 2K of RAM.  I've rarely needed even close to 2K of RAM for these applications, so the difference did not show up in my programs. 

 

So, Processor Expert is right, and the data sheet is wrong.

 

Following up, that data sheet is dated 2004.  Now, if you search for MC9S12A32 (here at freescale.com, that is), you end up with the data sheet for the DP512, which doesn't even pretend to cover the A32. 

 

While we're on the subject of memory allocation in PE, you have to assign the start address on the Properties tab, and the start address again, along with the memory size on the Build tab.  Why?  I understand assigning the start address, and, for split FLASH, enabling/disabling/relocating the second block, but why does the start address have to be entered twice, and why is the size adjustable at all?  This is PE v.2.92;  I also have 2.99 for the 56F8300E.  It does everything on the Build tab, so maybe it's been fixed.

 

Thanks for your help.  I think I have it all under control now.

 

Gary Olmstead

Toucan Technology

Ventura CA

0 Kudos