AnsweredAssumed Answered rt 1062 SEMC DMA performance

Question asked by Ivan Osipov on Apr 10, 2020
Latest reply on Apr 21, 2020 by Hui_Ma

Dear sirs.

I try now interfacing imxrt1060<-->FPGA via SEMC SRAM interface with sync mode 16 bit multiplexed Addr/Data.

I use DMA transfer to/from FPGA and have a quite large time gaps between bursts in transfer.

My used parameters:

AXI and SEMC frequencies 150MHz

SEMC sync mode, latency=3, burst=4(->burst 16 words)

DMA transfer size 1 KB, DMA granularity 32 bytes;

All of this functionally works, I can write, read and check results. Time diagrams inside the each burst seems OK.

But overall transfer speed is more then 2-x  less than expected.

We have this results (controlled by oscilloscope with CS pin):

150Mhz    WR    1KB    overall time=10us    burst16 time=140ns    gap time=170ns    speed=102.4MBps
150MHz    RD    1KB    overall time=10.5us    burst16 time=170ns    gap time=170ns    speed=97.5MBps

The best 1KB transfer time (in theory) must b:

32 {bursts} *(1{CS}+1{ADW}+3{latency}+16{burst}+1{/CS}+1{interval})*Tclk=4.9 us;


What causes our time gaps and how to eliminate/decrease it?

I attach a register dumps, captured just before DMA transfer launch, and ready to supply any other information if needed.


Thank you. Ivan.


I look at that threads for imx 6s, and can`t find any solution there...

.../thread/438098, .../thread/356944, .../thread/440832