SDRAM test fails when executing from SDRAM...

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SDRAM test fails when executing from SDRAM...

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EdSutter
Senior Contributor II

Hi, I am currently using the MIMXRT1060-EVK.  I have an application that I can build to run XIP from QSPI-nor or it can boot out of QSPI-nor and transfer itself to SDRAM and run.  The application resides in the lowest 1M of the SDRAM space, and part of the application is an SDRAM test.  I run the test on various portions of the SDRAM and find that errors are detected when I invoke the test while executing out of SDRAM, but if I run the test while executing from FlexSPI-nor things are fine.  Obviously, I am not testing the area that I am executing from while executing out of SDRAM.

I build with gcc-arm, and I use the evkmimxrt1060_sdram_ini_dcd.c/h files from the SDK to init the SDRAM.

Anyone ever have this problem?

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Ed Sutter ,

  Please check my document, it will be useful to you:

RT1050 SDRAM app code boot from SDcard burn with 3 tools 

  When you generate the SDRAM code, please relocate your app from 0X80002000 or more bigger address.

  Please check my project SDRAM app configuration.

  Then if you still want to boot from the external flash, you can use the MCUbootUtility, or Flashloader, or the MCUXPresso Secure Provisioning tool configure the external flash, and download the code, it is simliar to the SD card.

  If you still have questions about it, please kindly let me know.

Wish it helps you!.

If you still have question about it, please kindly let me know.

 

Kerry

 

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EdSutter
Senior Contributor II

Hi Kerry, 

Thanks for the response.  I can do that, but can you explain why that is needed?

The only reason I can think of is that the initial code that boots out of non-volatile memory may need some of that space for its own variables; but that doesn't justify/explain why an SDRAM test would fail.

Ed

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kerryzhou
NXP TechSupport
NXP TechSupport

Hello Ed Sutter,

  Thanks for your updated information.

  From 0X1000 to put the IVT, DCD, BD data.

  So, please try to follow me, put your code from 0X80002000, then try it again!

  If you still have questions about it, just kindly let me know.

  

  

Kerry

 

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EdSutter
Senior Contributor II

Kerry,

I do appreciate your response, and I seriously do not mean this disrespectfully (since I'm sure you know this environment better than I); but I have a running system that boots out of QSPI-nor-flash.  The IVT & DCD are in NOR already.  This must be working otherwise I wouldn't even be booting.  So I still have to ask why would I need to adjust my address from 0x80000000 to 0x80001000?

Also, I moved my board to a different USB port and have not seen the problem since, so I have to conclude that it was a power issue (until/unless it re-occurs).  Meanwhile, I would still like to know why you recommend the 0x1000 offset.

Thanks for your patience,

Ed

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Ed Sutter,

   Thank you for your updated information.

   My previous relocation should be modified to 0X2000, not just 0X1000.

   0X1000 is to the Non-XIP usage(like external is SD card), 0X2000 is used for the XIP image.

  About the detail reason, please check the following application note:

https://www.nxp.com/docs/en/nxp/application-notes/AN12238.pdf 

  Let me tell you which information is useful to you:

1. 

• IVT (Image Vector Table):
— Required.
— Offset: 0x0400 (non-XIP flash)/0x1000 (XIP flash).
— Description: The structure includes the address information of the application binary, DCD, BD, and CSF.
• BD (Boot Data):
— Required.
— Offset: 0x0420 (non-XIP)/0x1020 (XIP).
— Description: The structure includes the start address and size of the SB image.
• DCD (Device Configuration Data):
— Optional.
— Offset: Defined in the IVT.
— Description: Currently used to configure the SDRAM (SEMC interface).
• Application binary:
— Required.
— Offset: 0x2000 (Typical).
— Description: The pure application binary.

2. 

pastedImage_4.png

Because you put the SDRAM code in the external XIP flash flash, you need to relocate your SDRAM APP code from 0X80002000.

Today, I also do the test on my MIMXRT1060-EVK board, it also demonstrate this theory.

I attach my image code, if you have interest and the MIMXRT1060-EVK board, you also can test it.

I am generate 3 images:

evkmimxrt1060_iled_blinky_0x80000000.s19

evkmimxrt1060_iled_blinky_0x80001000.s19

evkmimxrt1060_iled_blinky_0x80002000.s19

Then use the MCUBootUtility tool download it.

DCD is using:evkmimxrt1060_xip_boot_header_dcd.bin in 

\NXP-MCUBootUtility-2.2.0\src\targets\MIMXRT1062

pastedImage_5.png

From the boot picture, you can find the stage3 ROM code will copy the IVT and the BD code to your SDRAM address 0X80001000, that's why I request you relocate your app code from 0X80002000.

In fact, more talking is weaker than the test, so, I suggest you find a simple project and test it on your side, which relocate the app to 0X80002000.

I also attach my SDK led_Blinky code for your reference, it is relocated to the 0X80002000.

If you still have questions about it, welcome to let me know, please take easy! :smileyhappy:

Kerry

 

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