I am attempting to test our iMXRT1061 based hardware prototype. It uses two QSPI devices, one on the FLEXSPIA port connected as per the QSPI on the evaluation board and another connected to the FLEXSPIB port. The signals between QSPIA, QSPIB and the 1061 are connected as configured by the ROM Bootloader apart from FLEXSPI_B_SS0_B, the chip select for the B device. This has been connected to its other ALT pad GPIO_SD_B1_05. As this was set as the DQS pad for the evaluation board Hyperflash and as it's not used by the QSPI device, we thought it would be free.
I have since found out that the DQS pad should have been left unconnected as for maximum performance we really want the loopback dummy read strobe to loopback at the pad. This is now not possible with this hardware so I have set the readSampleClkSrc byte in the memory configuration in the image boot header block so that it will loopback internally. I assumed then that the FLEXSPI would ignore this pad and it would be free.
Our code is to execute in place from QSPIA and to be able to read and write to QSPIB. However, when the XIP code starts and the pinmux is set up there is a processor exception when IOMUXC_SetPinMux() is called to assign pad GPIO_SD_B1_05 to FLEXSPI_B_SS0_B. I relocated the function to internal RAM and this made no difference.
If I link the entire project into RAM and run it using the J-link debugger, there are no problems and the QSPIB can be accessed. I assume this is because the internal ROM boot code does not run in this case.
So my questions are:-
Is it possible to XIP from QSPIA and re-assign the pad that the ROM bootloader has previously assigned to FLEX_SPI_A_DQS to now perform the function of FLEXSPI_B_SS0_B? If so, how can I do that.
If we move the FLEXSPI_B_SS0_B to its other ALT pad, the same as the ROM Bootloader uses, then we can XIP from QSPIA and loopback (the now unused DQS pad) at the pad at high speed. Unfortunately the hardware design does not allow me to free the DQS pad for QSPIB, so this would have to loopback internally and run at a reduced speed. Is this possible or do both A and B ports have to run at the same sample clock speed?
I have found a related post https://community.nxp.com/thread/516432 That states the reduced speed is 60MHz on the RT1021. I cannot find this information in the iMXRT1060 Reference Manual. This is also the case on the 1061?