CodeWarrior U-Boot/SPL Debug?

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CodeWarrior U-Boot/SPL Debug?

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tmorrison
Contributor III

Hi, 

I am trying to figure out what is wrong in general with my board (or CodeWarrior).

I have read all the whitepapers - and I am properly creating a debug configuration

that has U-Boot OS Awareness. 

Unfortunately, it seems that something U-Boot OS Awareness does is that it doesn't know

how to interpret memory very well. 

In the attached image - I am debugging u-boot configuration (with OS Awareness) and,

I set a break point in the spl code after loading the spl header (and more).

   The Green is the header.

   The RED is the problem ('????????')

If I debug just the SPL (with our without OS awareness)  then I see the correct value for *(0x82000000) = (0x1400000a

??

Tom

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yipingwang
NXP TechSupport
NXP TechSupport

Hello Thomas Morrison,

Please make sure that u-boot binary on the target board is from the same build with u-boot elf imported in CodeWarrior project.

In addition, have you use DDRv tool to validate and test DDR memory? Is it possible to run the bareboard CodeWarrior program in DDR memory on your target board?

Thanks,

Yiping

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tmorrison
Contributor III

I can debug - so the u-boot binary is the same, this is mainly about the memory browser and seeing all the "???????" 

after DDR has been initialized. 

Yes, I have used QCVS_DDR tool and Yes, I have run out of OCRAM and run a DDR Initialization and memory test

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yipingwang
NXP TechSupport
NXP TechSupport

I still suspect there is problem at DDR initialization on your target board.

I suggest you use DDR validation tool to connect to the target board to do "Centering the clock", "Read/Write ODT and driver" validation and "Operational DDR tests".

Please refer to https://community.nxp.com/docs/DOC-333349 

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tmorrison
Contributor III

I have multiple times, I have done an extensive memory test running from ocram, and that has worked....

I don't have a problem with the debug (it was another problem that I fixed), but this ???????? is 

troubling to me. Especially after the u-boot spl code has initialized DDR

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