I have one question for FlexCan Mailbox.as mentioned in user mannual,each CAN channel support 96 message buffers.
which can be configued as rx or tx.but if the message number is greater than 96,how can we deal with the messages?
did you meant what to do if you have more message to be sent/received than it is number of available message buffers? If yes then it depends on actual needs.
For transmitting messages; with the single CAN module you can use less MBs and create some SW TX queue to manage message to be sent. The MB is selected for transmission based on internal arbitration and after successful transmission the MB can be again prepared for another transmission.
For receiving messages; you can use mask acceptance registers to create ID ranges to be received, if it is possible in application. Also the RXFIFO can used where the ID table can be defined and so incoming messages is stored into RXFIFO. These ways you can reduce number of MBs needed.
Also several CAN modules can be connected to the same transceiver. This allows more RX buffers to be available for a node. But in this case, only one module is used for transmit and the other CAN module’s transmit pins are not connected. Just RX pins are connected. The receiving module should be set in Listen-only mode (CTRL1[LOM] bit set). Transmission is disabled, all error counters are frozen and the module operates in a CAN Error Passive mode. Only messages acknowledged by another CAN station will be received. If FlexCAN detects a message that has not been acknowledged, it will flag a BIT0 error, as if it was trying to acknowledge the message. RX interrupt are functional in LOM mode normally.
yes, I try to test the FIFO for flexCan,the main scripts are as belows:
FLEXCAN_DRV_Init(INST_CANCOM1, &canCom1_State, &canCom1_InitConfig0);
FLEXCAN_DRV_SetRxMaskType(INST_CANCOM1, FLEXCAN_RX_MASK_GLOBAL); FLEXCAN_DRV_SetRxFifoGlobalMask(INST_CANCOM1,FLEXCAN_MSG_ID_STD,0x1FFFFFFF);
but unfortunately, I can't receive CAN messages in recvBuff.is there anything wrong?Do you have any suggestion?
hope your answer,thank you.
should below example be helpful?
Example MPC5748G FlexCAN RXFIFO SDK PA RTM200 S32DS.Power.2017.R1
I download the example,and check the code.I see the filter for FIFO is working.
but I have some questions:
1,there are two kinds of MASK,one is FLEXCAN_RX_MASK_INDIVIDUAL, the other one is FLEXCAN_RX_MASK_GLOBAL.what's the difference for these two mask(s)?
2,regarding the function FLEXCAN_DRV_SetRxIndividualMask(INST_CANCOM1, FLEXCAN_MSG_ID_STD, id_counter, 0xFFFFFFFF),is the id_counter message buffer ID or the application message ID?
3,if I want to banding one message buffer with several specific application messages,how did I configure it?
4,if I use fifo and message buffer multiplexing together as shown in example,if the fifo occupied message buffer 0-7,if I try to set rx individual mask,is the message buffer starting from message buffer 8?
1) this configure MCR[IRMQ] bit, this bit indicates whether Rx matching process will be based either on individual masking (RXIMRn) or on masking scheme with RXMGMASK, RX14MASK and RX15MASK, RXFGMASK.
2) it is RXIMR register number
3) The Accepance mask registers are used to filter incoming ID. ID ranges can be used if mask register is set desirably. There is bit2bit correspondence between received ID, mask and programmed MB ID (or RXFIFO ID filter elements). The mask says if corresponding incoming ID bit is compared with programmed ID bit.
If mask bit is cleared the incoming ID bit is not compared, it is don’t care. If mask bit is set, then there must be exact match between incoming ID bit and programmed ID bit. To receive a message into a MB/RXFIFO all relevant bits with mask bit set must be equal to programmed one.
4) yes, in this case available MBs start from MB8
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