we are trying to connect
- iMX6SX cpu
- x86 module
The iMX6SX must be a PCIe Endpoint.
I need only shared memory between iMX6SX and x86. I do not need interrupt.
Shared memory must be in a region of DDR RAM of iMX6SX.
On iMX6SX I use linux-imx-imx_4.9.88_2.0.0_ga-var01.
On x86 I'm using an EFI shell that allow me to see pci devices and addresses assigned.
I reserve some memory for shared memory, so Linux will not use this.
I boot with mem=128M.
I start using the endpoint configuration used from the validation test.
On Linux I have
I power-on the iMX6SX and I see on serial console :
PCIe EP: waiting for link up...
All is OK ... iMX6SX is waiting PCIe link.
Now I reset the x86 module.
As soon as I power-on x86, iMX6SX get the link.
For now all is OK.
Now I have a linux uart console.
On x86 I can see using the EFI shell the PCI configurazione.
- my endpoint as Memory controller - RAM memory controller.
- VID and PID are correct.
- the address assigned by x86 to BARs.
- the correct size of the BARs I assigned
The problem is that after some seconds linux freezes.
On the x86 I can see the PCI register of the iMX6SX endpoint.
x86 works OK, does not freeze.
I attach the complete dump of my PCI endpoint.
From the dump I see two strange things:
- Command register go to 0.
- Received Master Abort: 1
Only for testing, I tried linux-imx-rel_imx_4.1.15_2.1.0_ga and linux-imx-rel_imx_4.14.98_2.0.0_ga.
On 4.1.15 I have seen problem with the PCIe link, with 4.14.98 I have seen something similar what I have seen with 4.9.88.
I did not investigate.
On 4.14.98 I have seen an option in menuconfig.
but I don't think it is the right way to follow.
My final question is if I'm on the correct way using EP config used for Validation Test.
Is this OK as a base for PCIe Endpoint ? If is not complete, what it is missing ?
I realize that I could have setted badly some address in PCI controller, but for now, if none writes (x86 and iMX6SX), I think that this kind of error could not be important.
Thanks for your time,