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S32K144/146: Alternatives for back to back ADC conversion, when using all ADC0 channels

Question asked by Javier Rico on Mar 17, 2020
Latest reply on Mar 18, 2020 by Petr Stancik

Hello,

 

It is my understanding, per 

S32K1XXRM rev 12.1 page 171 "This bit field [PDB_BB_SEL_2, PDB_BB_SEL_1] is ... Reserved and Read-Only Zero for S32K14x"

and

S32K144 ADC 

that only 8 ADC0 channels with PDB0 can be used in back to back mode for S32K144 and S32K146, thus option PDB_BB_SEL_2/SIMCHIPCTL[23]=0

PDB_BB_SEL_1/SIMCHIPCTL[22]=1

PDB_BB_SEL/SIMCHIPCTL[13]=X

is not supported.

 

What is then the alternative to use, considering throughput usage and responsiveness? Or (least preferred option) should the PCB be modified to use only 8 ADC0 channels and the remaining from ADC1?

 

Note: software trigger is selected as the trigger input source.

 

Thanks,

JR

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