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DP83867IR integration on IMX solo

Question asked by Amit Priye on Feb 23, 2020
Latest reply on Feb 24, 2020 by igorpadykov

Hi,

 

I am using DP83867IR module  and want to integrate to IMX solo custom board.

I have done changes in dtsi and enable configuration in kegrnel Kconfg

Below are the changes.

 

 fec: ethernet@0 {
                                         pinctrl-names = "default";
                                         pinctrl-0 = <&pinctrl_enet>;
                                         phy-mode = "rgmii";
                                         phy-reset-gpios = <&gpio1 25 0>;
                                         phy-handle = <&etnphy>;
                                         fsl,magic-packet;
                                         status = "okay";
                                         mdio {
                                                #address-cells = <1>;
                                                #size-cells = <0>;

 

                                etnphy: ethernet-phy@0 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <0>;
                                        pinctrl-names = "default";
                                        pinctrl-0 = <&pinctrl_enet_mdio>;
                                        interrupts-extended = <&gpio7 1 IRQ_TYPE_EDGE_FALLING>;

 

pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
>;
};

pinctrl_enet_mdio: enet-mdiogrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
>;
};

 

I am still  facing issue with probing.

Please let us know if we are missing anything.

 

Thanks,

Isharat

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