in RT1020 Reference Manual Table 42-3 LPSPI Command Word in Master Mode (continued) is the following entry for FRAMESZ:
Does the above mean if I my frame size is more than one FIFO entry the last FIFO entry should include at least 2 bits of the frame size?
e.g. 32 bits are okay ( = 1 FIFO entry)
33 bits are not okay (= 2 FIFO entries, the second one would only include 1 bit)
64 bits are okay (= 2 FIFO entries)
65 bits are not okay because it would be 2 FIFO entries with 32 bit each and one FIFO entry with 1 bit
Therefore similar frame sizes to 33 bits would be 65 bits, 97 bits, 129 bits, ... Is this correct?