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Rslv Resolver ADC sampling synchronization

Question asked by Ni Zhang on Feb 12, 2020
Latest reply on Feb 13, 2020 by Ni Zhang

Hello Guys 

Recently I am studying NXP application note AN3943, RSLV resolver driver application note. 

There is one point that I am not quite understand: 


How to synchronize the ADC trigger signal that can make sure the ADC samples at the peak point of the resolver analog reference signal? 


From the diagram (Figure 9), I can see there are resolver digital reference and resolver analog reference (this should be the excitation signal). So in my understanding, the resolver digital reference is generated by the eTPU PWM function, so what is the relationship between the resolver digital reference and resolver analog reference? I am a little bit confused about that. How to configure this PWM output and the ADC trigger PWM from the eTPU to make sure the synchronization?


I attached both screenshots of the diagram. 


Thanks a lot for your help