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Problems with LPDDR3 setup with IMX7S

Question asked by James Jamesson on Feb 12, 2020
Latest reply on Feb 18, 2020 by James Jamesson

Hi, NXP Community,

 

I am having problems with initializing the MT52L256M32D1PF LPDDR3 memory with the IMX7S hosted on a custom layout. Currently I am having problems bringing up the board and I am unable to jump to U-boot, leading me to this that this issue is LPDDR3 memory related. 

 

I have managed to get everything working on the IMX7Sabre board that uses 2x4GB DDR memories with a different setup, and the same sequence fails on our custom board hosting a 1x8GB DDR. I am aware that I am supposed to configure the DDR registers according to our setup, and so far I have used the IMX7D script aid for programming the registers. The output of the tool works well with the IMX7Sabre board, but not with our custom board. It is important to note that our custom board hosts an IMX7S, and not the IMX7D as on the Sabre board, but we adjusted the register configurations to our layout setup. Hence, here are my two questions:

 

- Is there a script aid for the IMX7S chip aid as well, or should the IMX7D script aid work for us?

- Can anyone point out any obvious reasons to why our LPDDR3 configuration works with the IMX7D chip on the Sabre, but does work with our IMX7S?

 

With regards,

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