i.MX8QXP Reference Manual chapter 8.1 says:
This chapter describes the clocking for all the subsystems in the chip. The chip has three clock sources, two of them originate from external crystals and the third is generated internally by a ring oscillator. The two external crystal oscillators generate 24MHz and 32KHz, and the ring oscillator generates 200MHz. The 32KHz clock can be also sourced from an internal Ring Oscillator, but the frequency will be inaccurate ( +/- 20%) in this case.
The Ring Oscillator which can generate 200 MHz will be switched off after the initial start up and the 24MHz External Oscillator will take over for the remainder.
I have questions about this 200MHz clock.
Q1) This PLL is not written in the clock tree figure or table of the manual ?
Q2) Is this a provisional PLL until the DIG_PLL0 stabilizes after the power is turned on ?
（During normal operation, this 200 MHz ring oscillator is not running.）