I have been using the KV46 on a design and I can't seem to get individual masking working for both CAN0 & CAN1. When I write those bits I enter/exit freeze mode. I set the global CAN filter to 0. When I send the CAN messages that the system will see They always received into MB 0. The only way I can get them to be received into individual mailboxes based on ID is to clear the individual IRMQ bit in the MCR and set the global mask to 0x3FFFFFFF. Is there something else that needs to be done to enable individual mailbox Mask IDs?