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ddr3 calibration error with IMX6UL custom board

Question asked by west chu on Jan 31, 2020
Latest reply on Feb 20, 2020 by west chu

Hi,All

We made some custom board with IMX6UL chip and  MT41K64M16-125 SDRAM,and encountered problems while doing ddr calibration on board by  ddr_stress_tester_v3.00. There are calibration log as follow:

============================================
Boot Configuration
SRC_SBMR1(0x020d8004) = 0x00000870
SRC_SBMR2(0x020d801c) = 0x02000001
============================================

ARM Clock set to 528MHz

============================================
DDR configuration
DDR type is DDR3
Data width: 16, bank num: 8
Row size: 13, col size: 10
Chip select CSD0 is used
Density per chip select: 128MB
============================================

Current Temperature: 32
============================================

DDR Freq: 396 MHz

ddr_mr1=0x00000000
Start write leveling calibration...
running Write level HW calibration
MPWLHWERR register read out for factory diagnostics:
MPWLHWERR PHY0 = 0x00000087

HW WL cal status: no suitable delay value found for byte 1
Write leveling calibration completed but failed, the following results were found:
MMDC_MPWLDECTRL0 ch0 (0x021b080c) = 0x001F0000
Write DQS delay result:
Write DQS0 delay: 0/256 CK
Write DQS1 delay: 31/256 CK


Error: failed during write leveling calibration

The script I used can make calibration success on official board IMX6ULEVK.

Hope you can give me some advice about what happen to my board.

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