Documentation is IMX7 Dual Application Processor Reference Manual.
The IMX7 in Boot Internal Mode [1,0] uses Boot_CFG[19:0] pins to determine device selected and associated parameters of device. EFUSES are not blown and reside in their default state.
Consider only two device selections available Boot_CFG[15;12] = 0110 (Serial ROM SPI) or 0001 (SD/eSD/SDXC)
It is understood that what ever device is selected the associated CFG pins are configured for that function of the device, however there are specific pins namely BOOT_CFG, CFG,CFG that are not listed specific to either device.
How does the IMX7 boot process handle these pins, CFG[19,18,16]?
These three pin are not addressed in Table 6-41 USDHC Boot eFUSE or Table 6-46 Serial ROM Boot eFUSE.
As listed in Table 6-25 Boot eFUSE
CFG is the Infinite Loop enable at start of boot ROM, default state 0.
CFG is BT_FREQ selection.
CFG is BT_MMU_DISABLE and is either MMU....cache...disable or SPI recovery. This may be an error as listed.
When using GPIO state for CFG, are these three pins utilized?
I assume that when a particular device is selected via CFG[15:12], unused CFG pins are IGNORED if not relevant to the device. However these three pins CGF, CFG, and CFG  are not clearly defined as to whether the boot will use the GPIO values for CFG setting.
If any person knows the definitive answer please respond quickly since I am in the final design stages and may have to alter the PCB design to resolve any conflicts.