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Glitch filter setting of the IRQ-pin of KEA

Question asked by Hiroyoshi Suzuki on Jan 28, 2020
Latest reply on Feb 10, 2020 by Jing Pan

Hi

I have a basic questions about the IRQ-pin function of KEA128. So, please help me.

 

Q1 : Glitch filter setting for the IRQ-pin
According to the KEA128 reference manual rev2, there are the following setting bits.
   PORT_IOFLT0[FLTRST]  :  for RESET-pin and IRQ-pin ( Section 6.2.2.1.1 also explain this. )
   PORT_IOFLT1[FLTIRQ]   :  for only IRQ-pin

Are these correct? Or, is the FLTRST-bit a mistake of only for a RESET-pin?

 

Q2 : KEA128 has both PORT_IOFLT0 and PORT_IOFLT1. But KEA64 has only one register of PORT_IOFLT.

Can't user use glitch filters for peripheral such as PWT or FTM if user is using KEA64?

 

Thank you very much in advance.

 

BR,

Hiroyoshi

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