Hi NXP team,
Please help to resolve below queries as well.
1) Can we use boot config pins after booting as SAI or GPIO interface? Is there any recommendation or design guideline on how this is to be taken care for these mux functionalities of boot config pins?
2) We are assigning GPIO and low speed peripherals as per attached sheet in pin mux tool. However, we are getting warning in tool . Please explain this and let us know if we have not assigned any power domain/GPIO correctly. We assume that whatever voltage we feed to particular power group, its GPIO will also operate at same voltage. If yes, we have allocated GPIO accordingly only. Please explain this warning.