It seems in the recent cores (especially e200) there are many instructions available in addition to the officially claimed Power ISA 2.03 and the available EREF, VLEPEM, SPEPIM, SPE2PIM, LSPAPURM but there is no overview document listing them all.
I could find mentions of the following APUs/instruction groups in various places:
- e500 branch-locking APU [mentioned in EB622 but could not find the instructions]
- isel instruction(mentioned and described in many places)
- saturation instructions for AutoSAR [mentioned in AN4802 but could not find specific instructions, is this just SPE?]
- Enhanced Reservations APU [?]
- Volatile Context Save/Restore APU [this one is described in EB696]
- Cache Bypass Storage APU [?]
Could be lbcbx, lhcbx, lwcbx, and stwwtx, sthwtx, stbwtx mentioned in MPC5775KRM but no actual descriptions found.
- MPU instructions [e200z7260n3 only?]
mpuwe, mpure, mpusync described in MPC5775KRM
- EB689 "Additional SPE Instructions" [evfsmadd, ... efsnmsub]
supposedly available only in VLE on e200z3 and e200z6. What about e200z4?
- e200z490 (AIOP) custom instructions
some intrinsic functions are described in CWAPPBTR, e.g Byte-Reversing, double/quad word loads and stores, math functions, cache bypass etc. but not the actual instructions. Another list is in AMF-DES-T1052
- SPE 2.1(? I think I've seen it mentioned somewhere but can't find it now. is it EB689?)
Is there an exhaustive list of these (and maybe more) somewhere with descriptions of instructions and opcodes?