In the datasheet for the RT1064 processor, I note the following under the GPIO supplies in the Operating ranges table:
"All digital I/O supplies (NVCC_xxxx) must be powered (unless otherwise specified in this data sheet) under normal conditions whether the associated I/O pins are in use or not."
Further review of the datasheet does not appear to show any conditions where one of the NVCC_xxxx power rails could be powered down.
Is it possible to power down the NVCC_SD0 rail but keep all of the other NVCC_xxxx rails powered up?
We are looking at power switching for an SD card on this interface, and would like to be able to power down the SD card when it is not required. The reference design seems to power down the SD card socket, but leave power applied to the interface pins (NVCC_SD0 power pin, plus the pull up resistors on the CMD and D0 pins), but is there any reason why the NVCC_SD0 pin (and associated pull-ups) could not be powered down at the same time?
When we started out development using the preliminary datasheets, I did ask this question and was told that it was OK to power down the NVCC_SD0 rail with the other rails still powered up, however, I am concerned that the released datasheet does not appear to support this mode of operation. I would be grateful for getting this clarified.