LS1043A write enable signal in Async NAND Flash mode

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LS1043A write enable signal in Async NAND Flash mode

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michael_machesk
Contributor I

I'm working with the LS1043A device and trying to figure out which write enable signal it will drive in Async NAND Flash mode.  In referring to the LS1043A Reference Manual (Rev. 4, 6/2018) Table 25-1 indicates that in Async NAND Flash mode IFC_NDDDR_CLK is driven as write enable NDWE_B.  Table 25-2 seems to agree with this in saying that IFC_NDDDR_CLK/NDWE_B is used as a write enable in Async NAND Flash mode and that WE[0]_B is used as a write enable in NOR/GPCM modes and as a SOF in GASIC mode.

However, Figure 25-6 shows the WE0/SOF_L output from the IFC connecting to the NAND Flash write enable signal (WE_B) instead of IFC_NDDDR_CLK/NDWE_B which seems to disagree with the info listed in Tables 25-1 and 25-2.

In Async NAND Flash mode will the IFC drive the IFC_NDDDR_CLK/NDWE_B output as the write enable to the Flash or will it drive WE[0]_B output?

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Bulat
NXP Employee
NXP Employee

It is a typo in our documentation in tables 25-1 and 25-2, IFC_WE0 signal is not well described. Actually either IFC_NDDDR_CLK or IFC_WE0 can be used as a Write Enable for async NAND flash. On our development boards we use IFC_WE0 as NAND's WE, it works fine.

Regards,

Bulat

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Bulat
NXP Employee
NXP Employee

It is a typo in our documentation in tables 25-1 and 25-2, IFC_WE0 signal is not well described. Actually either IFC_NDDDR_CLK or IFC_WE0 can be used as a Write Enable for async NAND flash. On our development boards we use IFC_WE0 as NAND's WE, it works fine.

Regards,

Bulat

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