I'm working with the LS1043A device and trying to figure out which write enable signal it will drive in Async NAND Flash mode. In referring to the LS1043A Reference Manual (Rev. 4, 6/2018) Table 25-1 indicates that in Async NAND Flash mode IFC_NDDDR_CLK is driven as write enable NDWE_B. Table 25-2 seems to agree with this in saying that IFC_NDDDR_CLK/NDWE_B is used as a write enable in Async NAND Flash mode and that WE_B is used as a write enable in NOR/GPCM modes and as a SOF in GASIC mode.
However, Figure 25-6 shows the WE0/SOF_L output from the IFC connecting to the NAND Flash write enable signal (WE_B) instead of IFC_NDDDR_CLK/NDWE_B which seems to disagree with the info listed in Tables 25-1 and 25-2.
In Async NAND Flash mode will the IFC drive the IFC_NDDDR_CLK/NDWE_B output as the write enable to the Flash or will it drive WE_B output?