AnsweredAssumed Answered

Internal arbitration delays when accessing H/W Registers

Question asked by Daniel Haslimann on Jan 22, 2020
Latest reply on Feb 6, 2020 by Felipe García

Hello

When the processor accesses H/W Registers like GPIO data registers or PWM value registers, there seem to be something like wait states where the processor has to wait for the peripheral.

Is there information in the manual what the cause for this delays are or how they can be influenced?

The delays are pretty "expensive" in some places. E.g. the write to two PWM value registers costs over 200ns in our project. This is like 120 processor cycles. We have to do this for 12 PWM submodules, which results in 2.4us only for the update of the PWM values. As we do this every 40us, this is a cpu load of about 6%.

 

Best regards and Thanks,

Daniel

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