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S32K144: GPIO input voltage thresholds for logical HIGH and LOW?

Question asked by Kedar Patil on Jan 20, 2020
Latest reply on Jan 23, 2020 by Daniel Martynek

I am a little confused about the GPIO input voltage thresholds for logical HIGH and LOW.

In S32K-DS datasheet, Section 5.3 DC electrical specifications at 3.3 V Range, it suggests:

 

After resolving that, the high low zones look like.

 

My confusion lies here. There is this band that seems to be either undefined or I am not able to fully understand the table.

 

Further, I had the following observations while testing voltage on an input pin on our custom board:

 

Config: The pin has an external 3V3 pull up and some intermediate circuit with voltage drop. 

1. When internal pin pull is OFF.

      - The voltage at pin is between ~1.65V - 2.0 V and it reads it as LOW (mostly, but not always).

2. When internal pin pull is PULL UP.

      - The voltage at pin is ~1.85V - 2 V and it always reads it as HIGH.

 

The two voltage ranges lie in the unknown band I mentioned above so I am not really sure what to expect of it.

 

Any help is appreciated.

 

Thanks!

 

- Kedar

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