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QN9080 internal OSC32M at 48 MHz?

Question asked by iosabi . on Jan 19, 2020
Latest reply on Jan 28, 2020 by Sebastián Del Río

I have a QN9080 chip revision D (QN9080DHNE) and I believe the internal OSC32M is running at 48 MHz, not 32 MHz. Is this even possible?

 

Here are the experiments I ran, the board has a 32 MHz external XTAL, I checked it with the oscilloscope and it runs at 32 MHz. When selecting the external XTAL as the system clock (CLOCK_AttachClk(kXTAL_to_SYS_CLK);) and setting a 115200 baudrate USART in FLEXCOMM0 everything works as expected and I see 115200 data on the serial port (~8.66us pulses in the TX line).

However, if all I change is the SYS clock to the internal OSC32M (CLOCK_AttachClk(kOSC32M_to_SYS_CLK);) then the USART output is wrong (the pulses are shorter). I did the math and it basically meant that the flexcomm clock was running at 48 MHz rather than the expected 32 MHz. So if I also change the "USART_Init(..., 32000000)" to use 48000000 everything works as expected in the USART output, which is a surprise.

 

Both the internal OSC32M_DIV and external XTAL_DIV are set to not divide, and there isn't really any other modification I can find to the OSC32 after reading the errata and the UM11023 user manual several times. The USART might not be the best example in terms of configure clocks, so I made the following example that shows the clock of the system in the output. This code is a 8-cycle loop, setting a GPIO pin in GPIOA (the GPIONUM one, previously set as an output) high for 4 cycles and low for another 4 cycles. Running this on the chip with the external XTAL as system clock gives me a 4 MHz 50% duty cycle in the output pin; while running this same code with the system clock set to OSC32M it gives me a 6 MHz clock in the pin. This shows that chip is running at 48 MHz, or I'm missing something else.

 

 #define GPIONUM nn
__asm__ volatile (
"loop:;\n"
" str %[off], [%[outdata]]\n"
" nop\n"
" nop\n"
" nop\n"
" str %[on], [%[outdata]]\n"
" nop\n"
" b loop\n"
: /* no outputs */
: [outdata] "r"(&(GPIOA->DATAOUT)),
[on] "r"(GPIOA->DATAOUT | (1 << GPIONUM)),
[off] "r"(GPIOA->DATAOUT & ~(1 << GPIONUM))
:
);

 

Some details from the chip:

Vdd is 1.8v from external power supply.

SYSCON->CHIP_ID = 0xfc00d010

SYSCON->FC_FRG = 0x00ff00ff  (thus, MULT0 = 0 and therefore flexcomm0 clock == CLOCK_GetFreq(kCLOCK_BusClk))

SWD connected to an LPC-Link2.

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