Jerauld Numata

NVPROT and Vector re-direction using initializer on MC9S08AW32

Discussion created by Jerauld Numata on Mar 25, 2009
Latest reply on Mar 26, 2009 by Jerauld Numata

I am trying to get a bootloader to run, but am having some issues with the Flash protection and Vector re-direction.  Just as a test, without any bootloader code, I tried just to enable the flash protection and vector re-direction using the initializer.

The vectors were relocated to 0xFDCC, as expected, with the reset vector remaining at 0xFFFE

The _Startup vector is loaded at this address.

I was expecting the app to run exactly the same as without re-direction, since all that should be happening is that the interrupt vector addresses were located at a different address.

Starting the app through the BDM debugger, it initially ran, but stopped with an illegal breakpoint.

Thinking this may be a debugger issue, I just programmed the flash, disconnected the BDM, power-cycled, and re-started.  The app still crashed.

 

The initializer's MCUInit code snippet for setting the NVPROT and NVOPT is shown below, along with the interrupt vector table

 

Any reason why the original app should not run as without vector re-direction? 

 

/* Initialization of the CPU registers in FLASH */

/* NVPROT: FPS7=1,FPS6=1,FPS5=1,FPS4=1,FPS3=1,FPS2=1,FPS1=0,FPDIS=0 */
const unsigned char NVPROT_INIT @0x0000FFBD = 0xFC;

/* NVOPT: KEYEN=0,FNORED=0,SEC01=1,SEC00=0 */
const unsigned char NVOPT_INIT @0x0000FFBF = 0x3E;

 

extern near void _Startup(void);

/* Interrupt vector table */
#ifndef UNASSIGNED_ISR
  #define UNASSIGNED_ISR 0xFFFF        /* unassigned interrupt service routine */
#endif

void (* near const _vect[])() @0xFDCC = { /* Interrupt vector table */
         UNASSIGNED_ISR,               /* Int.no. 25 Vrti (at FDCC)                  Unassigned */
         UNASSIGNED_ISR,               /* Int.no. 24 Viic1 (at FDCE)                 Unassigned */
         isrVadc1,                     /* Int.no. 23 Vadc1 (at FDD0)                 Used */
         UNASSIGNED_ISR,               /* Int.no. 22 Vkeyboard1 (at FDD2)            Unassigned */
         isrVsci2tx,                   /* Int.no. 21 Vsci2tx (at FDD4)               Used */
         isrVsci2rx,                   /* Int.no. 20 Vsci2rx (at FDD6)               Used */
         isrVsci2err,                  /* Int.no. 19 Vsci2err (at FDD8)              Used */
         isrVsci1tx,                   /* Int.no. 18 Vsci1tx (at FDDA)               Used */
         isrVsci1rx,                   /* Int.no. 17 Vsci1rx (at FDDC)               Used */
         isrVsci1err,                  /* Int.no. 16 Vsci1err (at FDDE)              Used */
         isrVspi1,                     /* Int.no. 15 Vspi1 (at FDE0)                 Used */
         isrVtpm2ovf,                  /* Int.no. 14 Vtpm2ovf (at FDE2)              Used */
         UNASSIGNED_ISR,               /* Int.no. 13 Vtpm2ch1 (at FDE4)              Unassigned */
         UNASSIGNED_ISR,               /* Int.no. 12 Vtpm2ch0 (at FDE6)              Unassigned */
         isrVtpm1ovf,                  /* Int.no. 11 Vtpm1ovf (at FDE8)              Used */
         UNASSIGNED_ISR,               /* Int.no. 10 Vtpm1ch5 (at FDEA)              Unassigned */
         UNASSIGNED_ISR,               /* Int.no.  9 Vtpm1ch4 (at FDEC)              Unassigned */
         UNASSIGNED_ISR,               /* Int.no.  8 Vtpm1ch3 (at FDEE)              Unassigned */
         UNASSIGNED_ISR,               /* Int.no.  7 Vtpm1ch2 (at FDF0)              Unassigned */
         UNASSIGNED_ISR,               /* Int.no.  6 Vtpm1ch1 (at FDF2)              Unassigned */
         isrVtpm1ch0,                  /* Int.no.  5 Vtpm1ch0 (at FDF4)              Used */
         isrVicg,                      /* Int.no.  4 Vicg (at FDF6)                  Used */
         UNASSIGNED_ISR,               /* Int.no.  3 Vlvd (at FDF8)                  Unassigned */
         UNASSIGNED_ISR,               /* Int.no.  2 Virq (at FDFA)                  Unassigned */
         UNASSIGNED_ISR                /* Int.no.  1 Vswi (at FDFC)                  Unassigned */
};

void (* near const _vectReset[])() @0xFFFE = { /* Interrupt vector table */
        _Startup                       /* Int.no.  0 Vreset (at FFFE)                Reset vector */
};

 

 

Thanks,

Jerry

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