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S32K144's MPU issue

Question asked by David Gabbay on Jan 15, 2020
Latest reply on Jan 16, 2020 by David Gabbay

I have an issue with the S32K144's MPU. I'm trying to protect an application depended region.
This implies that RGD0_WORDn should be modified (or disabled) because the default setting, out of reset, permits access to the entire P-flash.
However, once I try to modify any one of the RGD0_WORDn's registers (which disables RGD0 descriptor), I run to an exception. Furthermore, I duplicated RGD0 values to RGD1 (the UM says there is 'OR' relationship exists between the 8 descriptors), so that they are fully overlapped. Clearing RGD0_WORD3[valid] bit causes exception, but clearing RGD1_WORD1[valid] bit causes no exception.
My quick conclusion is that the descriptors must be sequentially enabled. If this is the case, (which I could not find in the UM) how to modify the default MPU setting?

 

Two notes:
1. All MPU manipulations executed after disabling CESR[valid] bit, meaning MPU is disabled.
2. After the exception I monitor the MPU registers and all ERDn registers remain cleared.

 

 

Here is the MPU setting before 'touching' RGD0 registers:

 

 

CESR: 0x00814000 @4000d000
EAR0: 0x00000000 @4000d010
EDR0: 0x00000000 @4000d014
EAR1: 0x00000000 @4000d018
EDR1: 0x00000000 @4000d01c
EAR2: 0x00000000 @4000d020
EDR2: 0x00000000 @4000d024
EAR3: 0x00000000 @4000d028
EDR3: 0x00000000 @4000d02c

RGD0_WORD0: 0x00000000 @4000d400
RGD0_WORD1: 0xFFFFFFFF @4000d404
RGD0_WORD2: 0x0061F7DF @4000d408
RGD0_WORD3: 0x00000001 @4000d40c
RGD1_WORD0: 0x00000000 @4000d410
RGD1_WORD1: 0xFFFFFFFF @4000d414
RGD1_WORD2: 0x0061F7DF @4000d418
RGD1_WORD3: 0x00000001 @4000d41c

RGD2_WORD0: 0x00000000 @4000d420
RGD2_WORD1: 0x0000001F @4000d424
RGD2_WORD2: 0x00000000 @4000d428
RGD2_WORD3: 0x00000000 @4000d42c

 

RGDAAC0: 0x0061F7DF @4000d800
RGDAAC1: 0x0061F7DF @4000d804
RGDAAC2: 0x00000000 @4000d808
RGDAAC3: 0x00000000 @4000d80c
RGDAAC4: 0x00000000 @4000d810
RGDAAC5: 0x00000000 @4000d814
RGDAAC6: 0x00000000 @4000d818
RGDAAC7: 0x00000000 @4000d81c

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