I am designing a product using the iMX6ULL. I need a clock to run my FPGA and cannot use
CCM Clock 1 or 2 since I am using SD card port 1 and I need the JTAG port operable. I am
thinking of using EIM "BCLK" and have found the "CONT_BCLK_SEL" bit in the EIM_WCR register.
There seems to be a lot of discussion in the community whether BCLK can function like one of the
CCM_CLK, this is possible? Will it work for my MCIMX6Y2CVM08AB part? I would like to test this
signal on my Freescale iMX6ULL-EVK and would also like to know how to change the UBOOT/ LINUX
software to accomplish this function from startup? If "BCLK" is not continuously possible can you suggest
any other means of getting a continuous clock for the iMX6ULL part?
Thanks for reading and helping!