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T1022 Clock Sequence

Question asked by Bob Russell on Jan 8, 2020
Latest reply on Jan 8, 2020 by Bulat Karymov



We are designing a custom board with a T1022 processor and would like to know if the there are any power-on sequencing requirements for the clocks?


Do all power rails need to be valid before clocks are enabled?


Is there minimum time the clocks need to be valid before PORESET_B is lifted?