Eli Hughes

LPC43xx Chip_Clock_EnableCrystal Hard fault advisory

Discussion created by Eli Hughes Employee on Dec 16, 2019
Latest reply on Dec 17, 2019 by xiangjun.rong

I am posting this as I ran into this issue after starting some new development with the LPC4357.

 

The function void Chip_Clock_EnableCrystal(void) in the chip support library has a while loop delay to pause for the crystal osc. to stablize before engaging the PLL.   The "stock" value of 1000 is not quite enough for many crystals and/or layouts.   

 

I am using the embedded artists  4357 developer kit and found that I can get a hardfault during the PLL init phase about 50% of the time.  Simply making this larger fixes the issue.       In my case I make it very large (100000)  and the PLL starts 100%.

 

No to need to respond, I am just posting this as an advisory.   I ran into this back in 2013 with the LPCOpen libraries and completely forgot I had versions of the libraries with this patched.

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