In: I have problem with SWD ST-Link(v2) in IAR(7.30, 7.50, 8.20/8.30). Connected by 3 wire (GND, SWDIO, SWCLK). Production prototype board on LPC51U68. Flashed by USB in mass-storage mod (cool!).
Have: When try to debug or flash CPU write log "No reset"(or kind a) and "unable to read CPU-ID from Cortex CPU". Oscill show that on both SWD line presents activity. Same debugger work OK with STM32(and other) under IAR .
Q1: I need to modify my ST-Link to get right #RESET to reset board?
Q2: Anybody debug this CPU by ST-Link (and his clone) under IAR? What option I need to set for correct work?
(Sorry for ugly language...)