MPC8270 Nested Interrupt handling

[muhammadumersae]

Dear,

I am using MPC8270 as our microprocessor for development and configured Port C interrupts PC6 and PC7.

Following is problem Description along with code snippet:

=> I have configured external interrupts for PORT C (PC6 and PC7 configured for High to Low transition)

------------------------------------------------------------------------------------------

pinAdrs = 0x3000000;

*M8260_IOP_PCSO(INTERNAL_MEM_MAP_ADDR) &= ~pinAdrs;  //Option register
*M8260_IOP_PCDIR(INTERNAL_MEM_MAP_ADDR) &= ~pinAdrs;  //Direction Register
*M8260_IOP_PCPAR(INTERNAL_MEM_MAP_ADDR) &= ~pinAdrs;  //Pin assignment register
*M8260_SIEXR(INTERNAL_MEM_MAP_ADDR) |= pinAdrs;    // External Interrupt register
*M8260_SIPNR_H(INTERNAL_MEM_MAP_ADDR) |= (pinAdrs);  // Interrupt pending register
*M8260_SIMR_H(INTERNAL_MEM_MAP_ADDR) |= pinAdrs;  //Interrupt mask register

intConnect (m8260InumToIvec(INUM_PC6), (VOIDFUNCPTR)ISR0, 0);    //Connect and ISR to Interrupt vector
intConnect (m8260InumToIvec(INUM_PC7), (VOIDFUNCPTR)ISR1, 0);   //Connect and ISR to Interrupt vector


m8260IntEnable (INUM_PC6);    // Enable Interrupts, vxworks specific Function
m8260IntEnable (INUM_PC7);    // Enable Interrupts, vxworks specific Function

-----------------------------

ISR0 ()

{

printf("ISR0");

}

ISR1 ()

{

printf("ISR1");

}

---------------------------

Note: Both Interrupts works fine individually.

Problem:

Individual External triggers on PC6 and PC7 works fine.

When i trigger both pins  PC6 and PC7 at the same time. The processor only executes ISR for PC7 i.e. ISR1 and discards the interrupt on PC6 i.e. ISR0.

Additional Information: Processor also hangs while it is executing an ISR on PC6 and another interrupt occurs on PC6 while the processor was busy executing ISR for previous assertion. 

Query:

(1) Why MCP8270 does not handle both interrupts occurs at the same time? 

(2) How to make MPC8270 work in this situation, i cannot afford to miss a single interrupt. Is there any software workaround for this problem?

(3) Does MPC8270 supports nested vector interrupt handling?

Regards

Umer Saeed

[alexander_yakov]

Please look MPC8280 Reference Manual, Figure 4-8 "MPC8280 Interrupt Structure".

As you can see, there is only one INT input from the interrupt controller to the processor core, if we take into account only normal interrupts and not Critical Interrupts and Machine Check interrupt. So, the core has only one INT input, and whet this input is asserted by the interrupt controller, the core enters INT handler, which is actually one for all interrupt sources. In this handler you have to read SIVEC register to determine, which interrupt is pending, and immediately clear its SIPNR bit. Immediately crearing the request in SIPNR is necessary to not loose the next interrupt request from the same source. After that, if you wish re-enable interrupts (for nesting interrupts), you have to store your current interrupt context (SRR0 and SRR1 registers) and re-enable external interrupts in MSR register. 

In your probpem description you said that:

When i trigger both pins  PC6 and PC7 at the same time. The processor only executes ISR for PC7 i.e. ISR1 and discards the interrupt on PC6 i.e. ISR0.

This means incorrect interrupt handling - interrupt subroutine from one request clears another request.  

Additional Information: Processor also hangs while it is executing an ISR on PC6 and another interrupt occurs on PC6 while the processor was busy executing ISR for previous assertion. 

This may mean the interrupt processing subroutine is not re-entrant. That is, the interrupt routine should be written in a way in which it can be executed once again, while it is already running. Creating re-entrant procedures is very tricky - it should not use static variables, should not lock external resources, and etc. Because of this reason, nesting interrupts from the same source is typically not used, it is assumed that nesting is used for higher-priority interrupts only. Masking low-priority interrupts is done by altering SIMR registers.

Direct link to mentioned MPC8280 Reference Manual:

https://www.nxp.com/docs/en/reference-manual/MPC8280RM.pdf