Jayasankar Bandaru

MC_RGM_DBRE register configuration

Discussion created by Jayasankar Bandaru on Dec 3, 2019
Latest reply on Dec 4, 2019 by Peter Vlna



I am working on SPC5746C MCU and I have few observations and doubts on power on reset concept in this MCU.

1. As per the datasheet, we can control the reset generation for POR. 

MC_RGM_DBRE[BE_POR] bit is 0x00, RESET will be generated.

MC_RGM_DBRE[BE_POR] bit is 0x01, RESET will not be generated. 

Please correct me if I am wrong.

2. For example, if I configured the MC_RGM_DBRE register to do not generate RESET to MCU. But, the PORST line status is changing from high to low and low to high (based on power status). Will it don't cause MCU RESET? 

3. Can I observe the PORST line status (is it reflecting to any register) ?

4. If any register is reflecting the status of PORST line status. When it will be set/1 and when it will be reset/0.


Can you guys clarify my doubts.