MC_RGM_DBRE register configuration

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MC_RGM_DBRE register configuration

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jayasankar_band
Contributor I

Hello,

I am working on SPC5746C MCU and I have few observations and doubts on power on reset concept in this MCU.

1. As per the datasheet, we can control the reset generation for POR. 

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MC_RGM_DBRE[BE_POR] bit is 0x00, RESET will be generated.

MC_RGM_DBRE[BE_POR] bit is 0x01, RESET will not be generated. 

Please correct me if I am wrong.

2. For example, if I configured the MC_RGM_DBRE register to do not generate RESET to MCU. But, the PORST line status is changing from high to low and low to high (based on power status). Will it don't cause MCU RESET? 

3. Can I observe the PORST line status (is it reflecting to any register) ?

4. If any register is reflecting the status of PORST line status. When it will be set/1 and when it will be reset/0.

Can you guys clarify my doubts.

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

Things are quite different from what you explained.

as you can see you cannot configure this register as the write option is greyed out:

pastedImage_13.png

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Any reset will be reflected on reset bidirectional pin.

3. Can I observe the PORST line status (is it reflecting to any register) ?

No, even if you can you will always read 1. What is the point to do this?

4. If any register is reflecting the status of PORST line status. When it will be set/1 and when it will be reset/0.

When the device is not powered it will be set to 0.

regards,

Peter

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