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E5500 Core HID0 Register

Question asked by burakorcun.ozkablan@tai.com.tr on Nov 22, 2019
Latest reply on Jan 15, 2020 by burakorcun.ozkablan@tai.com.tr

Hi,

 

I'm working on e5500 core, and have a question about HID0 representation difference between e5500 Core RM and BookE.

 

I'm tracking start.S file in arch/powerpc/cpu/mpc85xx directory of u-boot to learn how to e5500 core is initialized. When u-boot initializes HID0, it configures EMCP, ENMAS7 and TBEN bit(s) of HID0 register. Similarly, BookE has the definition of these HID0 bit(s). However, after i read e5500 Core RM, i noticed that HID0 representation is different than BookE, some bits like ENMAS7 and TBEN aren't available in e5500 Core RM.

 

TBEN bit of HID0 enables timebase and ENMAS7 bit of HID0 is used for 36-bit addressing. If these bits aren't available in e5500 Core RM, do i have to assume that these bits were already activated?

 

Thanks in advanced.

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