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LPSPI0 communication between S32K144 and S32K142 not working

Question asked by Akshay Kulkarni on Nov 19, 2019
Latest reply on Nov 25, 2019 by Akshay Kulkarni

Hello,

I am working with 2 EVBs, S32K144 as a SPI master and S32K142 as SPI slave. LPSPI0 is selected. Pins are properly connected. Both Tx and Rx buffers are configured (not NULL). PCS0 <--> PCS0 both configured as Input and output, CLOCK<---> CLOCK both conf. as Input and Output, MISO->MOSI and MOSI->MISO.

(Intention is behind PCS0 and clock as Input and output is I want to work Viceversa in next iteration by changing roles.)
My test scenario is as below:
1. S32K144 as a Master and S32K142 as a Slave on LPSPI0.
2. I am sending an instance of a structure from S32K144 to S32K142. 
[I loop MasterBlocking on S32K144 for array of 10 instances]
Observation is,
Slave reception IRQ is called only on first reception on S32K142 and it returns with Transmit buffer underrun error. On master side I get Success and Garbage data is received on master.
On next iterations on Master, it keeps on returning success with reception of garbage data from Slave. 
Slave[S32K142] do not get any callback second time onwards.
Can someone please help me on this. 
Thank you.

Regards,
Akshay K.

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